1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the same, and more particularly, to a trench isolation type semiconductor device which prevents a recess from being formed in a field region, and a method of fabricating the same.
2. Description of the Related Art
As semiconductor devices become ever more highly integrated, technologies used to reduce the size of an isolation region, which takes up a considerable area of a semiconductor device, are being rapidly developed.
In general, semiconductor devices are isolated using LOCal Oxidation of Silicon (LOCOS). In LOCOS, a thin buffer insulating layer, that is, a pad oxide layer, is formed between a nitride layer and a semiconductor substrate and oxidized to form a field insulating layer to be used as an isolation region, so as to remove thermal stress. The thermal stress occurs because the thermal characteristics of the nitride layer, which is to be used as an oxide mask that defines an active region, are different than the thermal characteristics of the semiconductor substrate. Here, since the field insulating layer grows in a vertical direction with respect to the semiconductor substrate and oxidant (O2) is dispersed in a horizontal direction along the buffer insulating layer, the field insulating layer experiences undergrowth at the edge of a nitride layer pattern.
The shape of a growth caused by the phenomenon in which the field insulating layer encroaches upon the active region is similar to a bird's beak and thus is referred to as a bird's beak. The length of the bird's beak corresponds to half the thickness of the field insulating layer. In this regard, in order to prevent a size reduction of the active region, the length of the bird's beak should be minimized.
In order to reduce the length of the bird's beak, a method of reducing the thickness of the field insulating layer has been introduced. However, in 16M or more DRAMs, if the thickness of the field insulating layer is reduced, an electrostatic capacity between an interconnection and a semiconductor substrate increases and a signal transmission speed is accordingly decreased. In addition, since a threshold voltage Vth of a parasitic transistor formed in an isolation region between devices is decreased by an interconnection to be used as a gate for a device, isolation characteristics between the devices are lowered.
Thus, methods of isolating devices by reducing the length of the bird's beak have been developed. The methods include poly Si buffered LOCOS (PBLOCOS) in which the thickness of a buffer insulating layer for buffering stress is reduced and a polycrystalline silicon layer is interposed between a semiconductor substrate and a nitride layer; sealed interface LOCOS (SILOCOS), which protects sidewalls of a buffer insulating layer with a nitride layer; and recess LOCOS, in which a field insulating layer is formed in a semiconductor substrate.
However, from the viewpoint of requirements of the surface planarity of isolation regions and the precision of a design rule, the aforementioned methods are not suitable for isolation technology for a next generation device such as a DRAM having an integration density of 256M or more.
Thus, buried oxide (BOX) type shallow trench isolation (STI) that can solve the problems of conventional isolation methods has been developed. In BOX type STI, a trench is formed in a semiconductor substrate and silicon oxide or polycrystalline silicon excluding dopant is filled into the trench using chemical vapor deposition (CVD). More specifically, the trench is filled with an oxide layer and the oxide layer is etched back so that a flat surface can be obtained. Thus, a bird's beak is not formed and an active region is not damaged.
Use of STI, in which the size of the field insulating layer can be reduced much more than by using LOCOS, provides a secured active region. However, the process steps are more complicated than in LOCOS, and the field insulating layer formed in the trench is damaged by subsequent processes such as cleaning of an oxide layer, wet etching and dry etching. That is, several tens to several hundreds of angstroms of the field insulating layer may be damaged by subsequent processes. Accordingly, a step difference is created between the active region and a field region having an isolation region formed thereon, and a transistor becomes defective.